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  1 precision edge ? sy58051u micrel, inc. m9999-020707 hbwhelp@micrel.com or (408) 955-1690 description three matched-delay input pair provide any logic function: and, nand, or, nor, xor guaranteed ac performance over temperature and voltage: ? dc-to > 10.7gbps data rate throughput ? dc-to > 7ghz clock f max ?< 190ps any in-to-out t pd ?t r /t f < 60ps ultra low-jitter design: ?< 1ps rms random jitter ?< 10ps pp deterministic jitter ?< 10ps pp total jitter (clock) unique input termination and v t pin accepts dc- coupled and ac-coupled inputs (cml, pecl) internal 50 ? output source termination typical 400mv cml output swing (r in =50 ? ) internal 50 ? input termination power supply 2.5v 5% or 3.3v 10% C40 c to 85 c temperature range available in a 16-pin (3mm 3mm) mlf ? package features ultra-precision cml anygate? with internal input and output termination precision edge ? sy58051u applications data communication systems oc-192, oc-192+fec all sonet oc-3 oc-768 applications all fibre channel applications all gige applications rev.: c amendment: /0 issue date: february 2007 the sy58051u is an ultra-fast, low jitter universal logic gate with a guaranteed maximum data or clock throughput of 10.7gbps or 7ghz, respectively. this anygate ? differential logic device will produce many logic functions of two boolean variables, such as and, nand, or, nor, delay, or negation. the sy58051u differential inputs include a unique, internal termination design that allows access to the termination network through a v t pin. this feature allows the device to easily interface to different logic standards, both ac- and dc-coupled without external resistor-bias and termination networks. the result is a clean, stub-free, low- jitter interface solution. the differential cml output is optimized for 50 ? environments with internal 50 ? source termination and a 400mv output swing. the sy58051u operates from a 2.5v or 3.3v supply, and is guaranteed over the full industrial temperature range (C40 c to +85 c). the sy58051u is part of a micrels precision edge ? product family. all support documentation can be found on micrels web site at www.micrel.com. functional block diagram typical application anygate and precision edge are registered trademarks of micrel, inc. micro leadframe and mlf are registered trademarks of amkor technology, inc. v tb b /b v ta a /a q /q 0 1 50 ? 50 ? 50 ? 50 ? v ts s /s 50 ? 50 ? s 10gbps 2 23 C1 prbs (100mv input, 400mv output) precision edge ?
2 precision edge ? sy58051u micrel, inc. m9999-020707 hbwhelp@micrel.com or (408) 955-1690 package/ordering information pin number pin name pin function 1 vta input termination center tap: each of the two inputs, (a, /a) terminates to this pin through a 50 ? resistor. the v ta pin provides a center-tap to a termination network for maximum interface flexibility. see input interface applications section for more details. 15,16 a, /a differential input: these input pairs are the two data inputs to the device. each pin of a pair 2, 3 b, /b internally terminates to the v ta or v tb pin to 50 ? . note that these inputs will default to an indeterminate state if left open. see input interface applications section for more details. 4 vtb input termination center tap: each of the two inputs, (b, /b) terminates to this pin through a 50 ? resistor. the v tb pin provides a center-tap to a termination network for maximum interface flexibility. 5, 6 s, /s differential input: this input pair is the select input to the device. each pin of this pair internally terminates to the v ts pin to 50 ? . note that this input will default to an indeterminate state if left open. see input interface applications section for more details. 7 vts input termination center tap: each of the two inputs, s, /s terminates to this pin. the v ts pin provides a center-tap to a termination network for maximum interface flexibility. 8, 13 vcc positive power supply. bypass with 0.1 f ?? 0.01 f low esr capacitors. 12, 9 q, /q differential output: this cml output pair is the output of the device. it is a logic function of the a, b, and s inputs. see truth tables for details. 10, 11, 14 gnd, ground. exposed pad must be connected to the same potential as gnd pin. (exposed pad) pin description 13 14 15 16 12 11 10 9 1 2 3 4 8 7 6 5 vta b /b vtb q gnd gnd /q /a a gnd vcc s /s vts vcc 16-pin mlf ? (mlf-16) ordering information (1) package operating package lead part number type range marking finish SY58051UMI mlf-16 industrial 051u sn-pb SY58051UMItr (2) mlf-16 industrial 051u sn-pb sy58051umg (3) mlf-16 industrial 051u with pb-free pb-free bar-line indicator nipdau sy58051umgtr (2, 3) mlf-16 industrial 051u with pb-free pb-free bar-line indicator nipdau notes: 1. contact factory for die availability. dice are guaranteed at t a = 25 c, dc electricals only. 2. tape and reel. 3. pb-free package recommended for new designs.
3 precision edge ? sy58051u micrel, inc. m9999-020707 hbwhelp@micrel.com or (408) 955-1690 a/ab /b s/s q /q 01x x 01 0 1 10x x 01 1 0 xx 011001 xx 101010 truth tables abs q /q xlhl h xhhh l + ( ( ( ( ( + ) ) ) ) ) abs q /q lhl l h hhl h l lhhh l hhh h l abs q /q lxs l h hxs h l and/nand or/nor delay/negation delay/negation ? ? ? ? ? ( ( ( ( ( ? ? ? ? ? ) ) ) ) ) abs q /q lll l h lhl l h llhl h lhhh l sq/q laa hbb 2:1 mux s /s a /a b /b ? ( ? ) v ee q /q v cc 1k ? v cc v ee 1k ? s /s a /a b /b + ( + ) q /q v cc v ee 500 ? s /s a /a b /b q /q s /s a /a b /b v cc q /q v ee 500 ? s /s a /a b /b q /q q s a b
4 precision edge ? sy58051u micrel, inc. m9999-020707 hbwhelp@micrel.com or (408) 955-1690 absolute maximum ratings (1) supply voltage (v cc ) .................................. C0.5v to +4.0v input voltage (v in ) ......................................... C0.5v to v cc cml output voltage (v out ) ......... v cc C1.0v to v cc +0.5v termination current (3) source or sink current on v ta , v tb , v ts ............... 60ma input current source or sink current on a, /a, b, /b, s, /s ....... 30ma lead temperature (soldering, 20 sec.) ................... +260 c storage temperature (t s ) ....................... C65 c to +150 c operating ratings (2) supply voltage (v cc ) ...................... +2.375v to +2.625v or ............................................................ +3.0v to +3.6v ambient temperature (t a ) ......................... C40 c to +85 c package thermal resistance (4) mlf ? ( ja ) still-air ............................................................. 61 c/w mlf ? ( jb ) junction-to-board ............................................ 38 c/w t a = C40 c to +85 c, unless otherwise noted. symbol parameter condition min typ max units v cc power supply v cc = 2.5v. 2.375 2.5 2.625 v v cc = 3.3v. 3.0 3.3 3.6 v i cc power supply current no load, max. v cc .5570ma r diff_in differential input resistance 80 100 120 ? (a-to-/a or b-to-/b or s-to-/s) r in input resistance 40 50 60 ? (a-to-v ta , b-to-v tb or s-to-v ts ) v ih input high voltage note 6 1.2 v cc v (a, /a or b, /b or s, /s) v il input low voltage note 6 0v ih C0.1 v (a, /a or b, /b or s, /s) v in input voltage swing note 6 100 mv (a, /a or b, /b or s, /s) see figure 2a. v diff_in differential input voltage swing note 6 200 mv |aC, /a| or |bC, /b| or |sC, /s| see figure 2b. |i in | input current note 6 21 ma (a, /a or b, /b or s, /s) notes: 1. permanent device damage may occur if the ratings in the absolute maximum ratings section are exceeded. this is a stress ra ting only and functional operation is not implied for conditions other than those detailed in the operational sections of this data sheet. ex posure to absolute maximum ratings conditions for extended periods may affect device reliability. 2. the data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. due to the limited drive capability use for input of the same package only. 4. package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the pcb. jb uses 4-layer ja in still-air, unless otherwise stated. 5. the circuit is designed to meet the dc specifications shown in the above table after thermal equilibrium has been established . 6. due to the internal termination (see figure 1a) the input current depends on the applied voltages at a, /a and v ta inputs, the b, /b and v tb inputs or the s, /s and v ts inputs. do not apply a combination of voltages that causes the input current to exceed the maximum limit! dc electrical characteristics (5)
5 precision edge ? sy58051u micrel, inc. m9999-020707 hbwhelp@micrel.com or (408) 955-1690 v cc = 2.5v 5% or 3.3v 10%; r l = 100 ? across output pair or equivalent; t a = C40 c to +85 c; unless otherwise noted. symbol parameter condition min typ max units f max maximum operating frequency clock 7 ghz nrz data 10.7 gbps t pd propagation delay 70 190 ps any input (a, b, s)-to-q t skew part-to-part skew note 9 100 ps t jitter data random jitter (rj) note 10 1ps rms deterministic jitter (dj) note 11 10 ps pp clock cycle-to-cycle jitter (rj) note 12 1ps rms total jitter (tj) note 13 10 ps pp t r , t f output rise/fall times (20% to 80%) at full output swing. 20 60 ps notes: 7. the circuit is designed to meet the dc specifications shown in the above table after thermal equilibrium has been established . 8. measured with 100mv input swing. see timing diagrams section for definition of parameters. high-frequency ac parameters are guaranteed by design and characterization. 9. skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at t he respective inputs. 10. random jitter is measured with a k28.7 comma detect character pattern, measured at 2.5gbps/3.2gbps. 11. deterministic jitter is measured at 2.5gbps/3.2gbps with both k28.5 and 2 23 C1 prbs pattern. 12. cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, t n Ct nC1 where t is the time between rising edges of the output signal. 13. total jitter definition: with an ideal clock input of frequency f max , no more than one output edge in 10 12 output edges will deviate by more than the specified peak-to-peak jitter value. ac electrical characteristics (8) v cc = 2.5v 5% or 3.3v 10%; r l = 100 ? across output pair or equivalent; t a = C40 c to +85 c; unless otherwise noted. symbol parameter condition min typ max units v oh output high voltage q, /q v cc C0.020 v cc v v out output voltage swing q, /q see figure 2a. 325 400 500 mv v diff_out differential output voltage swing see figure 2b. 650 800 1000 mv q, /q r out output source impedance 40 50 60 ? q, /q cml outputs dc electrical characteristics (7)
6 precision edge ? sy58051u micrel, inc. m9999-020707 hbwhelp@micrel.com or (408) 955-1690 timing diagram input and output stage internal termination 50 ? 50 ? /a, /b, /s v cc 50 ? a, b, s v ta , v tb , v ts figure 1a. simplified differential input stage 50 ? 50 ? /q q v cc figure 1b. simplified differential output stage v in, v out 350mv (typical) figure 2a. single-ended swing 700mv (typical) v diff_in , v diff_out figure 2b. differential swing a /a t pd q /q b /b t pd q /q s /s t pd q /q definition of single-ended and differential swings
7 precision edge ? sy58051u micrel, inc. m9999-020707 hbwhelp@micrel.com or (408) 955-1690 typical operating characteristics v cc = 3.3v, gnd = 0, v in = 800mv. 0 50 100 150 200 250 300 350 400 450 500 0246810 12 14 q amplitude (mv) frequency (mhz) output swing vs. frequenc y 100 120 140 160 180 200 220 0 200 400 600 800 1000 1200 propagation delay (ps) input swing (mv) in-to-q propagation delay vs. input swin g 0 25 50 75 100 125 150 175 200 -60 -40 -20 0 20 40 60 80 100 propagation delay (ps) temperature ( c) (forced air) in-to-q propagation delay vs. temperature
8 precision edge ? sy58051u micrel, inc. m9999-020707 hbwhelp@micrel.com or (408) 955-1690 functional characteristics v cc = 3.3v, gnd = 0, v in = 800mv. 622mhz clock ti me (200ps/div) output swing (100mv/div) q /q 10 k28.7 clock pattern 1.25ghz clock ti me (100ps/div) output swing (100mv/div) q /q 10 k28.7 clock pattern 2.5ghz clock outpu swing (100mv/div) ti me (50ps/div) /q q 10 k28.7 clock pattern 7ghz clock ti me (20ps/div.) output swing (50mv/div.) /q q 10 k28.7 clock pattern 622mbps data (2 23 C1 prbs) t ime (200ps/div) output swing (100mv/div) 2 23 C1 prbs pattern 2.5gbps data (2 23 C1 prbs) output swing (100mv/div) t ime (50ps/div) 2 23 C1 prbs pattern 3.2gbps data (2 23 C1 prbs) ti me (50ps/div) output swing (100mv/div) 2 23 C1 prbs pattern
9 precision edge ? sy58051u micrel, inc. m9999-020707 hbwhelp@micrel.com or (408) 955-1690 input interface applications a, b, s /a, /b, /s vt sy58051u v cc nc input high level shown 1k ? gnd figure 3a. static input level a, b, s /a, /b, /s vt sy58051u v cc nc gnd figure 3b. lvds interface (dc-coupled) gnd a, b, s /a, /b, /s vt sy58051u v cc nc figure 3c. cml interface (dc-coupled) option: v t may be connected to v cc. gnd a, b, s /a, /b, /s vt 0.1 f sy58051u v cc v cc 0.01 f r 1 r 2 note: r 1 = 1k ? , r 2 = 1.4k ? . figure 3d. cml interface (ac-coupled) part number function data sheet link sy58016l 3.3v 10gbps differential cml line driver/ www.micrel.com/product-info/products/sy58016l.shtml receiver with internal termination sy58052u 10gbps clock/data retimer with 50 ? www.micrel.com/product-info/products/sy58052u.shtml input termination mlf ? application note www.amkor.com/products/notes_papers/mlf_appnote_0902.pdf hbw solutions new products and applications www.micrel.com/product-info/products/solutions.shtml related product and support documentation a, b, s /a, /b, /s vt sy58051u v cc gnd 0.1 f r b note: r b = 50 ? . v cc figure 3e. pecl interface (dc-coupled) a, b, s /a, /b, /s vt sy58051u v cc v cc 0.1 f r pd r pd r 1 r 2 0.1 f note: for 3.3v, r pd = 100 ? , r 1 = 1k ? , r 2 = 1.4k ? . for 2.5v, r pd = 50 ? , r 1 = 1k ? , r 2 = 1.4k ? . figure 3f. pecl interface (ac-coupled)
10 precision edge ? sy58051u micrel, inc. m9999-020707 hbwhelp@micrel.com or (408) 955-1690 16-pin micro leadframe ? (mlf-16) package notes: 1. package meets level 2 qualification. 2. all parts dry-packaged before shipment. 3. exposed pads must be soldered to a ground for proper thermal management. micrel, inc. 2180 fortune drive san jose, ca 95131 usa tel + 1 (408) 944-0800 fax + 1 (408) 474-1000 web http://www.micrel.com the information furnished by micrel in this data sheet is believed to be accurate and reliable. however, no responsibility is a ssumed by micrel for its use. micrel reserves the right to change circuitry and specifications at any time without notification to the customer. micrel products are not designed or authorized for use as components in life support appliances, devices or systems where malfu nction of a product can reasonably be expected to result in personal injury. life support devices or systems are devices or systems that (a) are intend ed for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant inj ury to the user. a purchasers use or sale of micrel products for use in life support appliances, devices or systems is at purchasers own risk and purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. ? 2005 micrel, incorporated. pa c kage ep- exposed pad die compside island heat dissipation heavy copper plane heavy copper plane v ee v ee heat dissipation pcb thermal consideration for 16-pin mlf ? package (always solder, or equivalent, the exposed pad to the pcb)


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